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 PROTECTION PRODUCTS Description
RailClamps are surge rated diode arrays designed to protect high speed data interfaces. The SR series has been specifically designed to protect sensitive components which are connected to data and transmission lines from overvoltage caused by ESD (electrostatic discharge), EFT (electrical fast transients), and lightning. The unique design of the SR series devices incorporates four surge rated, low capacitance steering diodes and a TVS diode in a single package. During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. The internal TVS diode prevents over-voltage on the power line, protecting any downstream components. The low capacitance array configuration allows the user to protect two high-speed data or transmission lines. The low inductance construction minimizes voltage overshoot during high current surges.
RailClamp Low Capacitance TVS Diode Array
Features
! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !
ESD protection to IEC 61000-4-2, Level 4 Array of surge rated diodes with internal TVS Diode Protects two I/O lines Low capacitance (<10pF) for high-speed interfaces Low clamping voltage Low operating voltage: 5.0V Solid-state silicon-avalanche technology
SR05
Mechanical Characteristics
JEDEC SOT-143 package UL 497B listed Molding compound flammability rating: UL 94V-0 Marking : R05 Packaging : Tape and Reel per EIA 481
Applications
USB Power & Data Line Protection Ethernet 10BaseT I2C Bus Protection Video Line Protection T1/E1 secondary IC Side Protection Portable Electronics Microcontroller Input Protection WAN/LAN Equipment ISDN S/T Interface
Circuit Diagram
Pin 4
Schematic & PIN Configuration
4 1
Pin 2 Pin 3
2
Pin 1
3
SOT-143 (Top View)
Revision 9/2000 1 www.semtech.com
SR05
PROTECTION PRODUCTS Absolute Maximum Rating
R ating Peak Pulse Power (tp = 8/20s) Peak Pulse Current (tp = 8/20s) Peak Forward Voltage (IF = 1A, tp=8/20s) Lead Soldering Temperature Operating Temperature Storage Temperature Symbol Pp k IP P VFP TL TJ TSTG Value 500 25 1.5 260 (10 sec.) -55 to +125 -55 to +150 Units Watts A V C C C
Electrical Characteristics
SR 05 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage Clamping Voltage Clamping Voltage Junction Capacitance Symbol VRWM V BR IR VC VC VC Cj It = 1mA VRWM = 5V, T=25C IPP = 1A, tp = 8/20s IPP = 10A, tp = 8/20s IPP = 25A, tp = 8/20s Between I/O pins and Gnd VR = 0V, f = 1MHz Between I/O pins VR = 0V, f = 1MHz 6 6 5 9.8 12 20 10 Conditions Minimum Typical Maximum 5 Units V V A V V V pF
3
pF
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SR05
PROTECTION PRODUCTS Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10 Peak Pulse Power - PPP (kW) 110 100 % of Rated Power or PP I 90 80 70 60 50 40 30 20 10 0.01 0.1 1 10 Pulse Duration - tp (s) 100 1000 0 0 25 50 75 100 125 150 Ambient Temperature - TA (oC)
Power Derating Curve
1
0.1
Pulse Waveform
110 100 90 80 Percent of IPP 70 60 50 40 30 20 10 0 0 5 10 15 Time (s) 20 25 30 td = IPP/2 e
-t
Clamping Voltage vs. Peak Pulse Current
10 Waveform Parameters: tr = 8s td = 20s 9 Forward Voltage - V (V) F 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 45 50 Forward Current - IF (A) Waveform Parameters: tr = 8s td = 20s
Forward Voltage vs. Forward Current
10 9 Forward Voltage - V (V) F 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 45 50 Forward Current - IF (A) Waveform Parameters: tr = 8s td = 20s % Change in Capacitance 0 -2 -4 -6 -8 -10 -12 -14 -16 0
Capacitance vs. Reverse Voltage
I/O to GND f = 1MHz
1
2
3 Reverse Voltage (V)
4
5
6
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SR05
PROTECTION PRODUCTS Applications Information
Device Connection Options for Protection of Two High-Speed Data Lines The SR05 TVS is designed to protect two data lines from transient over-voltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode VF) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 2 and 3. The negative reference (REF1) is connected at pin 1. This pin should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference (REF2) is connected at pin 4. The options for connecting the positive reference are as follows: 1. To protect data lines and the power line, connect pin 4 directly to the positive supply rail (VCC). In this configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. 2. The SR05 can be isolated from the power supply by adding a series resistor between pin 4 and VCC. A value of 10k is recommended. The internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. 3. In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pin 4 is not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one diode drop). ESD Protection With RailClamps RailClamps are optimized for ESD protection using the rail-to-rail topology. Along with good board layout, these devices virtually eliminate the disadvantages of using discrete components to implement this topology. Consider the situation shown in Figure 1 where discrete diodes or diode arrays are configured for rail-torail protection on a high speed line. During positive duration ESD events, the top diode will be forward biased when the voltage on the protected line exceeds the reference voltage plus the VF drop of the diode. Data Line and Power Supply Protection Using Vcc as reference
Data Line Protection with Bias and Power Supply Isolation Resistor
Data Line Protection Using Internal TVS Diode as Reference
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SR05
PROTECTION PRODUCTS Applications Information (continued)
For negative events, the bottom diode will be biased when the voltage exceeds the VF of the diode. At first approximation, the clamping voltage due to the characteristics of the protection diodes is given by: VC = VCC + VF (for positive duration pulses) PIN Descriptions (for negative duration pulses) VC = -VF However, for fast rise time transient events, the effects of parasitic inductance must also be considered as shown in Figure 2. Therefore, the actual clamping voltage seen by the protected circuit will be: VC = VCC + VF + LP diESD/dt (for positive duration pulses) VC = -VF - LG diESD/dt (for negative duration pulses) ESD current reaches a peak amplitude of 30A in 1ns for a level 4 ESD contact discharge per IEC 1000-4-2. Therefore, the voltage overshoot due to 1nH of series inductance is: V = LP diESD/dt = 1X10-9 (30 / 1X10-9) = 30V Example: Consider a VCC = 5V, a typical VF of 30V (at 30A) for the steering diode and a series trace inductance of 10nH. The clamping voltage seen by the protected IC for a positive 8kV (30A) ESD pulse will be: VC = 5V + 30V + (10nH X 30V/nH) = 335V This does not take into account that the ESD current is directed into the supply rail, potentially damaging any components that are attached to that rail. Also note that it is not uncommon for the VF of discrete diodes to exceed the damage threshold of the protected IC. This is due to the relatively small junction area of typical discrete components. It is also possible that the power dissipation capability of the discrete diode will be exceeded, thus destroying the device. The RailClamp is designed to overcome the inherent disadvantages of using discrete signal diodes for ESD suppression. The RailClamp's integrated TVS diode helps to mitigate the effects of parasitic inductance in Figure 2 - The Effects of Parasitic Inductance When Using Discrete Components to Implement Pro Rail-T Rail- To-Rail Pr o t ection "Rail-T Pro Topology Figure 1 - "Rail- To-Rail" Pr o t ection Topology (First Approximation)
Rail-T Pro Figure 3 - Rail-To-Rail Pr o t ection Using RailClamp Arrays RailClam p T V S Arra ys
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SR05
PROTECTION PRODUCTS Applications Information (continued)
the power supply connection. During an ESD event, the current will be directed through the integrated TVS diode to ground. The total clamping voltage seen by the protected IC due to this path will be: VC = VF(RailClamp) + VTVS This is given in the data sheet as the rated clamping voltage of the device. For a SR05 the typical clamping voltage is <16V at IPP=30A. The diodes internal to the RailClamp are low capacitance, fast switching devices that are rated to handle transient currents and maintain excellent forward voltage characteristics. Universal Serial Bus ESD Protection The figure below illustrates how to use the SR05 to protect one upstream USB port and the SRDA05-4 to protect two downstream USB ports. When the voltage on the data lines exceed the bus voltage (plus one diode drop), the internal rectifiers are forward biased conducting the transient current away from the protected controller chip. The TVS diode directs the surge to ground. The TVS diode also acts to suppress ESD strikes directly on the voltage bus. Thus, both power and data pins are protected with a single device. Reference Semtech application note SI96-18 for further information.
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SR05
PROTECTION PRODUCTS Typical Applications
Universal Serial Bus ESD Protection
ISDN S/T Interface Protection
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SR05
PROTECTION PRODUCTS Outline Drawing - SOT-143
Notes: (1) Controlling dimension: Inch (unless otherwise specified). (2) Dimension A and B do not include mold protrusions. Mold protrusions are .006" max.
Land Pattern - SOT-143
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SR05
PROTECTION PRODUCTS Marking Codes
Part Number SR05 Marking Code R05
Ordering Information
Par t Number SR05.TC SR05.TG Working Voltage 5V 5V Qty per Reel 3,000 10,000 R eel Size 7 Inch 13 Inch
Contact Information
Semtech Corporation Protection Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804
2000 Semtech Corp. 9 www.semtech.com


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